Engineering, 05.05.2020 17:22, dannyo6680

Suppose doubling the number of general-purpose registers from 32 to 64 would reduce the number of ld and sd instruction by 12%, but increase the latency of the register file from 150 ps to 160 ps and double the cost from 200 to 400. (Use the instruction mix [from 3(a) above] and ignore the other effects on the ISA)

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Suppose doubling the number of general-purpose registers from 32 to 64 would reduce the number of ld...