Computers and Technology, 05.08.2021 23:50, mav24
g Assume a two level cache with a 99% hit rate in L1 and an 85% hit rate in L2. Hits in L1 take 2cycles, while those in L2 take 10 cycles (i. e., L2 hit takes 10 cycles), and a miss in both cachesthat goes to memory takes 100 cycles. What is the average access time for this memory system, in cycles?
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g Assume a two level cache with a 99% hit rate in L1 and an 85% hit rate in L2. Hits in L1 take 2cyc...
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