For the following code, calculate the number of instruction cycles required to execute the following code, using the simplified pipeline timing rules in class, including the time to call this function with BL bro8 and the time to return from the function with BX LR. You can assume that the pipeline is full before the BL bro8 instruction is executed. bro8 instruction is executed. bro8:
MOV R1, RO
MOV R0, #0
MOV R2, #0x00000080
MOV R3, #0x00000001

bro8_loop:

TST R1, R2
ORRNE RO, R3
MOVS R2 , R2, LSR #1
MOV R3, R3, LSL #1 BNE bro8_loop BX LR Clock cycles:

If the clock rate is 1 GHz, what is the execute time in microseconds?

When making changes to optimize part of a processor, it is often the case that speeding up one type of instruction comes at the cost of slowing down something else. for example, if we put in a complicated fast floating-point unit, that takes space, and something might have to be moved farther away from the middle to accommodate it, adding an extra cycle in delay to reach that unit. the basic amdahl's law equation does not take into account this trade-off. a. if the new fast floating-point unit speeds up floating-point operations by, on average, 2ă—, and floating-point operations take 20% of the original program's execution time, what is the overall speedup (ignoring the penalty to any other instructions)? b. now assume that speeding up the floating-point unit slowed down data cache accesses, resulting in a 1.5ă— slowdown (or 2/3 speedup). data cache accesses consume 10% of the execution time. what is the overall speedup now? c. after implementing the new floating-point operations, what percentage of execution time is spent on floating-point operations? what percentage is spent on data cache accesses?