A perfect memory system implies that every memory access hits in the cache. However, in a real memory system, measurements show that in 1000 memory references there are 100 misses for the cache. (a) Find the average memory access time (in terms of ns) of the real memory system with a 3 GHz clock frequency, a miss penalty of 45 cycles, and a hit time of 3 cycles. (b) Suppose doubling the size of the cache increases the hit rate to 95%, but causes the hit time to increases to 4 cycles and the miss penalty to increase to 50 cycles. Is it beneficial to double the size of the cache