Consider a 2-way set-associative 32 byte cache for an 8-bit system. Each block is 8 bytes and an LRU eviction policy is used. Given the following sequence of cache accesses, determine whether each access is a hit or a miss and then classify each of the misses as one of compulsory, capacity, or conflict.
Additionally, break down each address to show the tag in order to help see what is in the cache. Please follow the format of the first row (which is filled out for you).

Address Tag Hit/Miss Compulsory Capacity Conflict
0x16 0x5 Miss X
0x14
0x34
0x15
0x26
0x35
0x27
0x06
0x01
0x09

Which of the following is not contained on the slide show toolbar? a. next button b. slide button c. close button d. pen too

When making changes to optimize part of a processor, it is often the case that speeding up one type of instruction comes at the cost of slowing down something else. for example, if we put in a complicated fast floating-point unit, that takes space, and something might have to be moved farther away from the middle to accommodate it, adding an extra cycle in delay to reach that unit. the basic amdahl's law equation does not take into account this trade-off. a. if the new fast floating-point unit speeds up floating-point operations by, on average, 2ă—, and floating-point operations take 20% of the original program's execution time, what is the overall speedup (ignoring the penalty to any other instructions)? b. now assume that speeding up the floating-point unit slowed down data cache accesses, resulting in a 1.5ă— slowdown (or 2/3 speedup). data cache accesses consume 10% of the execution time. what is the overall speedup now? c. after implementing the new floating-point operations, what percentage of execution time is spent on floating-point operations? what percentage is spent on data cache accesses?

Take a critical look at three gui applications you have used—for example, a spreadsheet, a word-processing program, and a game. describe how well each conforms to the gui design guidelines listed in this chapter.