Computers and Technology, 27.03.2020 01:44, cairolove228

We would like to make a counter module that counts 0-6 and then goes back to 0 and continues counting 0-6. You will need clk, reset inputs, and outputs the current count. Use a parameter Size to set the size of arrays to hold count and register. Used Systemverilog, always_ff, and always_comb, and don't use reg datatype.

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We would like to make a counter module that counts 0-6 and then goes back to 0 and continues countin...