In mips architecture, the program counter is:
a register that stores the next instruction to be executed
a register that stores the address of the next instruction to be executed
a binary counter that counts how many instructions have been executed
a control circuit that steps through a sequence of instructions
a register that stores the current location in memory to read and write from

Researchers measured the data speeds for a particular smartphone carrier at 50 airports. the highest speed measured was 78.1 mbps. the complete list of 50 data speeds has a mean of x overbarequals16.11 mbps and a standard deviation of sequals18.65 mbps. a. what is the difference between carrier's highest data speed and the mean of all 50 data speeds? b. how many standard deviations is that [the difference found in part (a)]? c. convert the carrier's highest data speed to a z score. d. if we consider data speeds that convert to z scores between minus2 and 2 to be neither significantly low nor significantly high, is the carrier's highest data speed significant? a. the difference is nothing mbps.