Meena Chavan Corp's computer chip production process yields DRAM chips with an average life of 2,000 hours and s = 120 hours. The tolerance upper and lower specification limits are 2,600 hours and 1,700 hours, respectively. Is this process capable of producing DRAM chips to specification?

a. Based on the given information the process capability ratio Cp = ?
b. Based on the process capability ratio Cp for the given information, one can say that the process is
c. For the given information Process capability index Cpk = ...
d. Based on the process capability index Cpk for the given information one can say the process

a.)Cp= 1.25 ; b.) process is very capable ; c.) 0.83 ; d.) does not meet requires specification.

Explanation:

Given the following ;

Average chip life = 2000 hours

Standard deviation = 120 hours

Tolerance upper specification limit = 2600 hours

Tolerance lower specification limit = 1700 hours

A.) process capability ratio (Cp) :

Cp = (Upper specification limit - Lower specification limit) ÷ 6(standard deviation)

Cp = (2600 - 1700) ÷ (6 × 120)

Cp = 900 ÷ 720 = 1.25

B.) Capability ratio of 1.25 demonstrated that it is very capable.

C.) process capability ratio index(Cpk) :

Mean (X) = (Upper specification limit(US) - Lower specification limit(LCL))

Mean(X) = 2000

Lower Cpk = (X - LSL) ÷ 3(standard deviation)

Lower Cpk = (2000 - 1700) ÷ (3 × 120)

Lower Cpk = 300 ÷ 360 = 0.83

Upper Cpk = (USL - X) ÷ (3 × Standard deviation)

Upper Cpk = (2600 - 2000) ÷(3×120)

Upper Cpk = 600 ÷ 360 = 1.67

Cpk = Minimum_of (Upper Cpk, Lower Cpk)

Cpk = Minimum_of (1.67,0.83)

Cpk = 0.83

D.) Cpk < 1.0, shows that it does not meet required specification.

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